Design of an Elliptic Curve Cryptography processor for RFID tag chips

Area of Science:

• Cryptography
• Embedded Systems
• Wireless Communication

Background:

• Radio Frequency Identification (RFID) is crucial for wireless sensor networks and the Internet of Things.
• Integrating public key cryptography with RFID is an active research area.

Purpose of the Study:

• To present an efficient Elliptic Curve Cryptography (ECC) Processor architecture specifically designed for RFID tag chips.
• To improve the performance and reduce the resource requirements of ECC implementation on resource-constrained RFID tags.

Main Methods:

• Developed a novel inversion algorithm requiring fewer registers.
• Introduced a new coordinate swapping method to reduce controller complexity and iterative calculation time.
• Utilized a modified circular shift register architecture to minimize register file area.
• Employed clock gating and asynchronous counters for reduced power consumption.

Main Results:

• Achieved a computation time of 176.7 K clock cycles for one elliptic curve scalar point multiplication over GF(2163).
• The processor occupies a gate area of 13.8 K using UMC 0.13 μm CMOS technology.
• Demonstrated low power and low cost consumption.

Conclusions:

• The proposed ECC Processor architecture is efficient and suitable for RFID tag chips.
• The design offers a prospective solution for enhancing security in RFID systems.
• Low power and cost make it ideal for widespread adoption in RFID applications.