Confinement-modulated junctionless nanowire transistors for logic circuits
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Updated: Apr 22, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
Published on: December 7, 2017
François Vaurette1, Renaud Leturcq, Sylvie Lepilliet
1Institut d'Electronique, de Microélectronique et de Nanotechnologie (IEMN), CNRS, UMR 8520, Avenue Poincaré - B.P. 60069, 59652 Villeneuve d'Ascq, France. francois.vaurette@iemn.univ-lille1.fr.
Abstract:
We report the controlled formation of nanoscale constrictions in junctionless nanowire field-effect transistors that efficiently modulate the flow of the current in the nanowire. The constrictions act as potential barriers and the height of the barriers can be selectively tuned by gates, making the device concept compatible with the crossbar geometry in order to create logic circuits. The functionality of the architecture and the reliability of the fabrication process are demonstrated by designing decoder devices.
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