Towards quantitative electrostatic potential mapping of working semiconductor devices using off-axis electron...

Area of Science:

• Materials Science
• Condensed Matter Physics
• Semiconductor Physics

Background:

• Accurate measurement of electrostatic potential in semiconductor devices under operating conditions is crucial for performance improvements.
• Current techniques often lack the required sensitivity, spatial resolution, or ability to measure under working conditions.

Purpose of the Study:

• To quantitatively characterize the electrostatic potential, electric field, and charge density distributions of an electrically-biased silicon p-n junction under working conditions.
• To identify and analyze the challenges associated with quantitative potential determination from experimental data.

Main Methods:

• Utilized off-axis electron holography to image the electrostatic potential of a biased silicon p-n junction.
• Performed three-dimensional electrostatic potential simulations for comparison with experimental results.

Main Results:

• Successfully measured electrostatic potential, electric field, and charge density distributions in a working Si p-n junction.
• Identified discrepancies between experimental holographic phase images and simulation results, highlighting challenges in quantitative analysis.

Conclusions:

• Quantitative analysis of electrostatic potential in biased devices requires careful consideration of electrostatic fringing fields, surface charges, specimen preparation damage, and limited spatial resolution.
• Off-axis electron holography is a promising technique, but further refinement is needed for precise quantitative potential mapping in semiconductor devices.