On the non-STDP behavior and its remedy in a floating-gate synapse
IEEE Transactions on Neural Networks and Learning Systems
|February 13, 2015
Summary
Researchers optimized a floating-gate (FG) synapse for neuromorphic computing, addressing non-STDP behavior. By modifying control gate waveforms, they achieved biologically accurate synaptic plasticity for improved learning rules.
Area of Science:
- Neuromorphic Engineering
- Solid-State Circuits
- Artificial Intelligence Hardware
Background:
- Floating-gate (FG) transistors offer nonvolatile weight storage for neuromorphic systems.
- Traditional FG synapses exhibit anomalous non-STDP behavior, deviating from biological learning rules.
Purpose of the Study:
- To theoretically analyze the cause of non-STDP behavior in FG synapses.
- To propose and experimentally validate a solution for achieving biologically accurate spike-timing-dependent plasticity (STDP).
Main Methods:
- Theoretical analysis of FG transistor operation under varying gate waveforms.
- Fabrication and experimental testing of a modified FG synapse in a 0.35-μm CMOS process.
- Circuit simulation for generating optimized control gate waveforms.
Main Results:
- Identified the theoretical cause of non-STDP behavior in traditional FG synapses.
- Demonstrated that modified control gate waveforms achieve biologically consistent STDP over a wide parameter range.
- Experimental validation of the proposed solution using a fabricated FG synapse.
Conclusions:
- The proposed method effectively corrects non-STDP behavior in FG synapses.
- This advancement enables more biologically plausible learning in neuromorphic hardware.
- Optimized gate waveform generation circuits are feasible for practical implementation.
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