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Related Concept Videos

Metal-Semiconductor Junctions01:24

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The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
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Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
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An electric field suffers a discontinuity at a surface charge. Similarly, a magnetic field is discontinuous at a surface current. The perpendicular component of a magnetic field is continuous across the interface of two magnetic mediums. In contrast, its parallel component, perpendicular to the current, is discontinuous by the amount equal to the product of the vacuum permeability and the surface current. Like the scalar potential in electrostatics, the vector potential is also continuous...
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Related Experiment Video

Updated: Apr 15, 2026

Chemical Synthesis of Porous Barium Titanate Thin Film and Thermal Stabilization of Ferroelectric Phase by Porosity-Induced Strain
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Ultrathin BaTiO₃-based ferroelectric tunnel junctions through interface engineering.

Changjian Li1,2, Lisen Huang, Tao Li3

  • 1†NUSNNI-Nanocore, National University of Singapore, Singapore 117411, Singapore.

Nano Letters
|March 25, 2015
PubMed
Summary

Ferroelectric tunnel junctions (FTJs) show potential for low-energy memory. By tuning interface asymmetry, high tunneling electroresistance (TER) was achieved in ultrathin BaTiO3 layers, paving the way for efficient electronic devices.

Keywords:
BaTiO3ferroelectric tunnel junctionsinterface engineeringoxide interface

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Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Nanotechnology

Background:

  • Ferroelectric tunnel junctions (FTJs) offer low switching energy for memory applications.
  • Enhanced tunneling electroresistance (TER) in FTJs can be achieved through asymmetric electrodes or metal-insulator interlayers.
  • A fundamental understanding of interface roles and integrated circuit compatibility in FTJs is lacking.

Purpose of the Study:

  • To investigate FTJ performance with varying electrode/ferroelectric interface asymmetry.
  • To explore the impact of interface properties on tunneling electroresistance.
  • To assess the potential of FTJs for low-energy memory applications.

Main Methods:

  • Fabrication and characterization of FTJs with systematically varied electrode/ferroelectric interface asymmetry.
  • Measurement of tunneling electroresistance (TER) at varying BaTiO3 layer thicknesses.
  • Analysis of the influence of band offsets at interfaces on TER ratio.

Main Results:

  • Achieved surprisingly high TER (∼400%) in BaTiO3 layers as thin as two unit cells (∼0.8 nm).
  • Demonstrated that band offsets at FTJ interfaces critically control the TER ratio.
  • Observed that off-state resistance (R(Off)) increases significantly more with the number of interfaces than on-state resistance (ROn).

Conclusions:

  • Interface engineering in FTJs is crucial for achieving high TER.
  • Band offsets at electrode/ferroelectric interfaces are key determinants of FTJ performance.
  • These findings support the development of future low-energy memory technologies based on FTJs.