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Updated: Apr 15, 2026

Key Factors Affecting the Performance of Sb2S3-sensitized Solar Cells During an Sb2S3 Deposition via SbCl3-thiourea Complex Solution-processing
Published on: July 16, 2018
Co-electroplated Kesterite Bifacial Thin-Film Solar Cells: A Study of Sulfurization Temperature
Jie Ge1,2,3, Junhao Chu1,2, Yanfa Yan3
1†Key Laboratory of Polar Materials and Devices (Ministry of Education), School of Information Science Technology, East China Normal University, Shanghai 200241, P. R. China.
Abstract:
Earth-abundant material, kesterite Cu2ZnSnS4 (CZTS), demonstrates the tremendous potential to serve as the absorber layer for the bifacial thin-film solar cell. The exploration of appropriate sulfurization conditions including annealing temperature is significant to gain insight into the growth mechanism based on the substrates using transparent conductive oxides (TCO) and improve device performance. The kesterite solar absorbers were fabricated on ITO substrates by sulfurizing co-electroplated Cu-Zn-Sn-S precursors in argon diluted H2S atmosphere at different temperatures (475-550 °C) for 30 min. Experimental proof, including cross-section scanning electron microscopy, X-ray photoelectron spectroscopy, X-ray diffraction, UV-vis-NIR transmission spectrum, and Raman and far-infrared spectroscopy, is presented for the crystallization of CZTS on an ITO substrate and the interfacial reaction between the ITO back contact and CZTS absorber. The complete conversion of precursor into CZTS requires at least 500 °C sulfurization temperature. The aggressive interfacial reaction leading to the out-diffusion of In into CZTS to a considerable extent, formation of tin sulfides, and electrically conductive degradation of ITO back contact occurs at the sulfurization temperatures higher than 500 °C. The bifacial devices obtained by 520 °C sulfurization exhibit the best conversion efficiencies and open circuit voltages. However, the presence of non-ohmic back contact (secondary diode), the short minority lifetime, and the high interfacial recombination rates negatively limit the open circuit voltage, fill factor, and efficiency, evidenced by illumination/temperature-dependent J-V, frequency-dependent capacitance-voltage (C-V-f), time-resolved PL (TRPL), and bias-dependent external quantum efficiency (EQE) measurements.

