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    Area of Science:

    • Computer Engineering
    • Artificial Intelligence
    • Hardware Acceleration

    Background:

    • Classical stochastic computing faces limitations in representing real numbers and noise immunity.
    • Existing hardware implementations of neural networks (NNs) can be costly and susceptible to errors.

    Purpose of the Study:

    • To propose a new methodology for hardware implementation of neural networks (NNs) using probabilistic laws.
    • To overcome the limitations of traditional stochastic computing by extending the representation range and enhancing noise immunity.
    • To demonstrate the feasibility and benefits of the novel approach for complex computational tasks.

    Main Methods:

    • Developed a novel encoding scheme based on the ratio of two bipolar-encoded pulsed signals.
    • Designed fundamental hardware blocks for implementing neural networks using the proposed probabilistic approach.
    • Validated the methodology through regression and pattern recognition tasks.

    Main Results:

    • The proposed encoding scheme extends the representation range to any real number.
    • The novel approach demonstrates practical total noise-immunity.
    • Successful implementation of fundamental NN blocks and validation on regression and pattern recognition tasks.

    Conclusions:

    • The new methodology offers a low-cost, highly reliable hardware implementation for neural networks.
    • The approach enables the implementation of complex mathematical functions, suitable for parallel computing.
    • This probabilistic encoding scheme represents a significant advancement in efficient and robust neural network hardware.