Pulse-forming-line based on-chip short pulse generator.

Area of Science:

• Electrical Engineering
• Microelectronics
• Integrated Circuit Design

Background:

• Traditional pulse generation circuits often rely on specialized components.
• Standard CMOS technology has limitations in generating very short pulses.
• On-chip integration of pulse generation offers advantages in size and speed.

Purpose of the Study:

• To implement and validate a traditional pulse-forming-line (PFL) based circuit for short pulse generation.
• To assess the feasibility of using standard digital CMOS technology for this application.
• To demonstrate the extended capabilities of CMOS for generating picosecond pulses.

Main Methods:

• A meandered on-chip coplanar waveguide was designed and used as the pulse-forming-line (PFL).
• A CMOS transistor was employed as the switching element within the circuit.
• Simulations were performed using Cadence Spectre, followed by fabrication and experimental testing.

Main Results:

• Pulses with durations of approximately 170 picoseconds were successfully generated.
• The generated pulses exhibited amplitudes ranging from 120 mV to 200 mV.
• Performance was validated across a power supply range of 1.2 V to 2 V.

Conclusions:

• The traditional PFL circuit design is viable for implementation in standard 0.13 μm digital CMOS technology.
• This approach significantly enhances the short pulse generation capabilities inherent to CMOS technology.
• The developed on-chip solution is suitable for generating short pulses in integrated systems.