Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired...

Area of Science:

• Neuromorphic Engineering
• Computational Neuroscience
• Nanotechnology

Background:

• Hierarchical Temporal Memory (HTM) models brain neocortex functions for pattern recognition.
• HTM's computational demands, like dot products, are energy-intensive.
• Efficient hardware implementations are crucial for advancing HTM.

Purpose of the Study:

• To propose a novel hardware implementation for HTM computing blocks.
• To leverage nanodevices for efficient spatial and temporal pattern identification.
• To reduce the energy consumption of HTM.

Main Methods:

• Designed HTM computing blocks using low-voltage magnetometallic spin-neurons.
• Integrated spin-neurons with an emerging resistive crossbar network.
• Conducted comprehensive design and simulation across algorithm, architecture, circuit, and device levels.

Main Results:

• Demonstrated the feasibility of mapping HTM primitives onto the proposed nanodevice architecture.
• Achieved significant energy efficiency improvements.
• Simulations indicated over 200x lower energy consumption compared to 45-nm CMOS ASIC.

Conclusions:

• The proposed spin-neuron and resistive crossbar network offers a highly energy-efficient solution for HTM.
• This approach paves the way for low-power, high-performance neuromorphic computing.
• Nanoscale devices can effectively address the computational challenges of advanced AI models.