Speed optimized linear-mode high-voltage CMOS avalanche photodiodes with high responsivity

Area of Science:

• Electrical Engineering
• Materials Science
• Optoelectronics

Background:

• Avalanche photodiodes (APDs) are crucial for sensitive light detection.
• Standard high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) processes offer a platform for integrated photonic devices.
• Optimizing APD design is essential for achieving higher operating speeds.

Purpose of the Study:

• To present two speed-optimized avalanche photodiodes (APDs).
• To investigate the impact of lateral well modulation doping on APD performance.
• To achieve enhanced bandwidths in APDs fabricated using a 0.35 μm HV CMOS process.

Main Methods:

• Fabrication of APDs in a 0.35 μm HV CMOS process.
• Implementation of lateral well modulation doping with varying effective doping concentrations (90% and 75%).
• Characterization of responsivity and -3dB bandwidth at different avalanche gains.

Main Results:

• High unamplified responsivity of 0.41 A/W at 670 nm was achieved.
• Optimized APDs demonstrated improved -3dB bandwidths of 1.02 GHz (75% doping) and 1.25 GHz (90% doping) at M=50.
• These bandwidths represent a significant increase compared to the unmodulated APD (850 MHz).

Conclusions:

• Lateral well modulation doping is an effective technique for enhancing APD speed.
• The optimized APDs offer superior bandwidth performance for high-speed applications.
• The 0.35 μm HV CMOS process is suitable for fabricating high-performance, speed-optimized APDs.