A Low Noise Amplifier for Neural Spike Recording Interfaces.

Area of Science:

• Electronics
• Biomedical Engineering
• Signal Processing

Background:

• Neural spike recording requires amplifiers with minimal noise and power consumption.
• Existing Low Noise Amplifiers (LNAs) often face trade-offs between power, area, and noise performance.
• Minimizing the noise efficiency factor is crucial for efficient neural signal acquisition.

Purpose of the Study:

• To present a novel Low Noise Amplifier (LNA) topology for neural spike recording applications.
• To introduce a transistor-level synthesis methodology for LNAs that minimizes the noise efficiency factor.
• To address the triple trade-off between power, area, and noise in LNA design.

Main Methods:

• A two-stage operational transconductance amplifier (OTA) with a capacitive feedback network was designed.
• A novel transistor-level synthesis methodology was developed for LNA noise efficiency factor minimization.
• The LNA was implemented using 130 nm CMOS technology, occupying 0.053 mm-sq.

Main Results:

• The proposed LNA achieved a noise efficiency factor of 2.16.
• Input-referred noise was measured at 3.8 μVrms with a 1.2 V power supply.
• The LNA provided a gain of 46 dB over a 192 Hz-7.4 kHz bandwidth, consuming only 1.92 μW.

Conclusions:

• The developed LNA effectively balances power, area, and noise for neural recording.
• The novel synthesis methodology enables efficient LNA design under area and noise constraints.
• Experimental validation in animal models confirms the LNA's suitability for in vivo neural spike detection.