Electrical Double Layer Capacitance in a Graphene-embedded Al2O3 Gate Dielectric
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Updated: Mar 30, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Bok Ki Min1,2, Seong K Kim3, Seong Jun Kim1
1Thin Film Materials Research Center, Korea Research Institute of Chemical Technology (KRICT), Yuseong P. O. Box 107, Daejeon 305-600, Republic of Korea.
Abstract:
Graphene heterostructures are of considerable interest as a new class of electronic devices with exceptional performance in a broad range of applications has been realized. Here, we propose a graphene-embedded Al2O3 gate dielectric with a relatively high dielectric constant of 15.5, which is about 2 times that of Al2O3, having a low leakage current with insertion of tri-layer graphene. In this system, the enhanced capacitance of the hybrid structure can be understood by the formation of a space charge layer at the graphene/Al2O3 interface. The electrical properties of the interface can be further explained by the electrical double layer (EDL) model dominated by the diffuse layer.
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