A feature design framework for hardware efficient neural spike sorting.

Area of Science:

• Biomedical Engineering
• Signal Processing
• Machine Learning

Background:

• Low-energy on-chip applications, such as implantable neural interfaces, require efficient signal processing.
• Feature extraction is a critical step in signal processing, impacting both performance and computational load.
• Existing methods often struggle to balance performance metrics with computational complexity.

Purpose of the Study:

• To propose a novel feature design framework that simultaneously optimizes for performance and computational complexity.
• To address the need for efficient feature extraction in low-power embedded systems.
• To demonstrate the framework's effectiveness in neural spike sorting applications.

Main Methods:

• Developed an optimization problem incorporating performance and computational complexity metrics.
• Designed features using the proposed framework for neural spike sorting.
• Compared the designed features against state-of-the-art low-complexity methods.

Main Results:

• The proposed framework successfully balanced signal processing performance and feature extraction complexity.
• Features designed using the framework demonstrated superior classification accuracy compared to existing methods.
• The framework yielded features with lower computational complexity than other state-of-the-art designs.

Conclusions:

• The proposed feature design framework offers a viable solution for developing efficient signal processing techniques.
• This approach is particularly beneficial for resource-constrained applications like implantable neural interfaces.
• The framework enables the creation of high-performance, low-complexity features for neural spike sorting.