SoC-based architecture for biomedical signal processing.

Area of Science:

• Biomedical Engineering
• Signal Processing
• Computer Engineering

Background:

• Numerous algorithms exist for biomedical signal processing, primarily focused on noise and artifact removal for monitoring and diagnosis.
• Remote monitoring with portable devices necessitates algorithms balancing accuracy with reduced computational complexity and power consumption.

Purpose of the Study:

• To present a System-on-Chip (SoC) architecture implemented on a Field-Programmable Gate Array (FPGA) for efficient biomedical signal processing.
• To validate the proposed architecture by implementing an efficient QRS complex detector.

Main Methods:

• Development of a novel System-on-Chip (SoC) architecture utilizing a Field-Programmable Gate Array (FPGA).
• Implementation and testing of a QRS complex detection algorithm on the proposed SoC architecture.
• Evaluation of the algorithm's performance in terms of sensitivity, positive predictive value, and resource utilization.

Main Results:

• The implemented QRS complex detector achieved high sensitivity and positive predictive values exceeding 99.49%.
• The proposed SoC architecture demonstrated efficient resource utilization, suitable for portable and low-power applications.
• Successful validation of the architecture for real-time biomedical signal processing tasks.

Conclusions:

• The presented FPGA-based SoC architecture offers an efficient solution for biomedical signal processing, particularly for telemedicine.
• The approach achieves a favorable trade-off between algorithmic accuracy and computational complexity.
• The validated QRS detector performance indicates suitability for remote patient monitoring and diagnostic applications.