A Low-Power ASIC Signal Processor for a Vestibular Prosthesis.

Area of Science:

• Biomedical Engineering
• Neuroscience
• Integrated Circuit Design

Background:

• Vestibular prostheses aim to restore balance by stimulating vestibular nerve fibers.
• Accurate processing of head motion signals is crucial for effective vestibular prosthesis function.
• Existing systems may face challenges with sensor misalignment and mimicking natural vestibular responses.

Purpose of the Study:

• To develop a low-power Application-Specific Integrated Circuit (ASIC) signal processor for a vestibular prosthesis (VP).
• To enable in-vivo stimulation of vestibular nerve fibers using encoded head motion signals.
• To address sensor misalignment and replicate peripheral vestibular system dynamics.

Main Methods:

• Fabrication of a digitally assisted analog signal processor using TI 0.35 μm CMOS technology.
• Extensive operation in the CMOS subthreshold region for low power consumption.
• Implementation of coordinate system transformation and mimicry of semicircular canal and otolith frequency responses.

Main Results:

• The ASIC successfully encodes head motion signals into electrical pulses for vestibular nerve stimulation.
• Coordinate system transformation corrects for sensor misalignment.
• Mimicry of natural vestibular system frequency characteristics was achieved.
• The design occupies 6.22 mm² and consumes 1.24 mW at ± 1.6 V.

Conclusions:

• A low-power ASIC signal processor for vestibular prostheses has been successfully designed and fabricated.
• The processor effectively encodes head motion and addresses key functional requirements for vestibular stimulation.
• This technology holds promise for improving treatments for vestibular disorders.