All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement

Area of Science:

• Integrated Circuit Design
• Sensor Technology
• Semiconductor Devices

Background:

• Traditional inverter-based temperature sensors require two-point calibration for acceptable accuracy.
• Process variations and inherent sensor curvature limit accuracy in complementary metal-oxide semiconductor (CMOS) smart temperature sensors.
• Existing calibration methods reduce test costs but do not fully address sensor response non-linearity.

Purpose of the Study:

• To propose the first all-digital on-chip linearity enhancement technique for time-domain CMOS smart temperature sensors.
• To improve the accuracy and reduce the calibration complexity of smart temperature sensors.
• To develop a fully synthesizable technique for future Very Large Scale Integration (VLSI) systems.

Main Methods:

• Implementation of an all-digital time-domain smart temperature sensor using 90 nm Field Programmable Gate Arrays (FPGAs).
• Development and integration of an on-chip linearity-enhanced circuit to linearize the sensor's output curve.
• Testing the sensor's performance across eight different Xilinx FPGAs, utilizing one-point calibration.

Main Results:

• The linearized smart temperature sensor achieved a maximal inaccuracy of 2.5 °C, a 50% improvement over the unlinearized version (-20 °C to 100 °C range).
• The sensor demonstrated a power consumption of 95 μW at a sampling rate of 1 kSa/s.
• The technique successfully reduced the influence of process variations, enabling one-point calibration with enhanced accuracy.

Conclusions:

• The proposed all-digital linearity enhancement technique significantly boosts the accuracy of time-domain CMOS smart temperature sensors.
• This method avoids complex curvature compensation, offering a cost-effective solution for high-accuracy temperature sensing.
• The fully synthesizable nature of the technique facilitates its integration into future VLSI designs.