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Monitor design with multiple self-loops for maximally permissive supervisors

YuFeng Chen1, ZhiWu Li2, Kamel Barkaoui3

  • 1School of Electro-Mechanical Engineering Xidian University No. 2 South Taibai Road Xi׳an 710071, China; Cedric Lab and Computer Science Department Conservatoire National des Arts et Métiers, Paris 75141, France.

ISA Transactions
|February 10, 2016
PubMed

Keywords:
Deadlock preventionFlexible manufacturing system (FMS)Petri netSelf-loopSupervisory control

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