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A variation of transmission electron microscope sample preparation for VLSI analysis
1Intel Corporation, Santa Clara, California 95052-8126.
Journal of Electron Microscopy Technique
|February 1, 1989
Summary
This study presents a modified mechanical dimpling technique to significantly reduce ion milling time for very large-scale integration (VLSI) analysis. The optimized method achieves sample thinning in under 30 minutes with improved location control.
Area of Science:
- Materials Science
- Electrical Engineering
- Semiconductor Manufacturing
Background:
- Standard sample preparation for VLSI analysis involves lengthy ion milling.
- Precise control over the thinned sample area location is challenging.
- Current methods are time-consuming and can lack positional accuracy.
Purpose of the Study:
- To reduce the time required for sample preparation in VLSI analysis.
- To improve the control over the location of the thinned area in samples.
- To present a modified mechanical dimpling technique for faster and more precise sample preparation.
Main Methods:
- Modification of standard mechanical dimpling tools, including a radiused edge on the dimpling tool and a rubber O-ring on the polishing tool.
- Elimination of sample platen rotation during the polishing process.
- Utilizing sample translation micrometers for precise location adjustment during thinning.
Main Results:
- Reduced ion milling time to less than 30 minutes.
- Achieved reasonable control over the location of the thinned sample area.
- Produced samples of equivalent quality compared to standard preparation methods.
Conclusions:
- The modified mechanical dimpling technique offers a significant improvement in sample preparation efficiency for VLSI analysis.
- This method provides better control over sample thinning location and reduces processing time.
- The optimized procedure yields high-quality samples suitable for advanced analysis.