Theory and implementation of a very high throughput true random number generator in field programmable gate array

Area of Science:

• Digital electronics
• Hardware security
• Random number generation

Background:

• True Random Number Generators (TRNGs) are crucial for secure communication and cryptography.
• Existing TRNGs often face limitations in throughput or hardware complexity.
• Field-Programmable Gate Arrays (FPGAs) offer a flexible platform for hardware implementation.

Purpose of the Study:

• To propose a new entropy extraction mechanism for high-throughput TRNGs.
• To leverage phase jitter in ring oscillators as a practical entropy source on FPGAs.
• To achieve high-speed, high-quality random bit sequences suitable for demanding applications.

Main Methods:

• Developed a novel entropy extraction mechanism based on sampling phase jitter in ring oscillators.
• Utilized a multi-phase sampling method to harvest clock jitter efficiently.
• Implemented the design on a Xilinx Artix-7 FPGA, exploiting carry chains for precise phase shifting.

Main Results:

• Achieved a total output throughput of 7.68 Gbps with 64 parallel circuit units.
• Demonstrated a simple, resource-saving circuit design suitable for scalable throughput.
• Verified the randomness and robustness of the generated sequences against ambient temperature variations.

Conclusions:

• The proposed method provides a practical and efficient approach for high-speed TRNGs on FPGAs.
• The digital, purely hardware-based solution meets the requirements of high-speed applications like quantum key distribution.
• This technique enables the generation of high-quality random bit sequences for diverse embedded systems.