In-Memory Computing Architectures for Sparse Distributed Memory.

Area of Science:

• Computer Engineering
• Artificial Intelligence
• Neuroscience

Background:

• Sparse Distributed Memory (SDM) is a computational model inspired by the human brain.
• Existing SDM architectures face challenges in energy efficiency and throughput.
• In-memory computing offers a promising approach to overcome these limitations.

Purpose of the Study:

• To propose and evaluate an energy-efficient and high-throughput Sparse Distributed Memory (SDM) architecture.
• To leverage the Compute Memory (CM) in-memory computing kernel for SDM applications.
• To analyze the performance of the proposed architecture in terms of delay, energy, and accuracy.

Main Methods:

• Developed a Compute Memory-based Sparse Distributed Memory (CM-SDM) architecture.
• Employed SDM-specific techniques like hierarchical binary decision (HBD) for optimization.
• Created circuit-aware behavioral, energy, and delay models for a 65 nm CMOS process.
• Evaluated performance in auto- and hetero-associative modes and image classification tasks.

Main Results:

• CM-SDM demonstrated up to 25x delay and 12x energy reduction compared to conventional SDM.
• Achieved output bad pixel ratios (Bo) ≤ 2% for classifying noisy 16x16 binary images.
• CM-SDM showed negligible accuracy loss, with Bo degradation within 0.4%.

Conclusions:

• The proposed CM-SDM architecture offers significant improvements in energy efficiency and throughput.
• CM-SDM is a viable solution for brain-inspired computing and machine learning applications.
• The architecture maintains high accuracy even with noisy input data.