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Three-Dimensional Fin-Structured Semiconducting Carbon Nanotube Network Transistor.

Dongil Lee1, Byung-Hyun Lee1, Jinsu Yoon2

  • 1School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST) , 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea.

ACS Nano
|December 28, 2016
PubMed
Summary

Large-scale, 3-D fin-structured carbon nanotube field-effect transistors (CNT-FETs) show improved gate control and charge transport. These novel CNT-FETs offer a promising alternative to silicon nanoelectronics.

Keywords:
3-D structurecarbon nanotubesfin field-effect transistor (FinFET)high packing densitywafer-scale

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Area of Science:

  • Semiconductor device physics
  • Materials science
  • Nanotechnology

Background:

  • Carbon nanotube field-effect transistors (CNT-FETs) offer potential for next-generation electronics due to their unique electrical properties.
  • Scaling up CNT-FET fabrication while maintaining performance has been a significant challenge.
  • Improving electrostatic gate control and charge transport is crucial for enhancing device performance.

Purpose of the Study:

  • To demonstrate large-scale fabrication of three-dimensional (3-D) fin-structured CNT-FETs.
  • To investigate the impact of 3-D geometry on device performance, including gate controllability and charge transport.
  • To explore the potential of these 3-D CNT-FETs as an alternative to silicon-based nanoelectronics.

Main Methods:

  • Fabrication of 3-D fin-structured CNT-FETs on an 8-inch silicon wafer using purified 99.9% semiconducting single-walled carbon nanotubes (SWCNTs).
  • Formation of a trigated structure on a 3-D silicon frame, surrounding a randomly networked SWCNT channel.
  • Integration of a thin back gate oxide for threshold voltage (VTH) control.

Main Results:

  • Achieved a high effective CNT packing density of nearly 600 CNTs/μm.
  • Demonstrated enhanced electrostatic gate controllability and superior charge transport due to the 3-D fin structure.
  • Showcased highly sensitive VTH controllability for power consumption management and performance enhancement.

Conclusions:

  • The developed 3-D CNT-FETs exhibit superior performance characteristics compared to conventional devices.
  • These devices offer a broadened design margin for carbon nanotube-based circuit architectures.
  • The proposed 3-D CNT-FETs present a viable alternative to silicon nanoelectronics and a blueprint for other low-dimensional materials.