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Optimized Fabrication Procedure for High-Quality Graphene-based Moiré Superlattice Devices
Published on: July 11, 2025
1School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, 1205 W State Street, West Lafayette, IN 47907, USA. zhchen@purdue.edu and Intel Corporation, 2501 NW 229th Avenue, Hillsboro, OR 97124, USA.
Large-area multi-layer graphene (MLG) effectively blocks copper ion diffusion, outperforming tantalum barriers. This low-temperature deposition method enhances graphene
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