A reconfigurable cryogenic platform for the classical control of quantum processors

Area of Science:

• Quantum Computing Control Systems
• Cryogenic Electronics
• Digital Error Correction

Background:

• Classical control infrastructure for large-scale quantum computers faces integration and processing time challenges.
• Coherence time limitations necessitate efficient control loops for quantum error correction.

Purpose of the Study:

• To characterize a cryogenic reconfigurable platform for quantum computer control infrastructure.
• To evaluate the performance of field-programmable gate array (FPGA) components across a wide temperature range (4 K to 300 K).

Main Methods:

• Implementation of a digital error-correction control loop on a cryogenic FPGA platform.
• Extensive characterization of FPGA building blocks including LUTs, CARRY4, MMCM, PLL, BRAM, and IDELAY2 from 4 K to 300 K.
• Testing of an integrated analog-to-digital converter (ADC) performance at cryogenic temperatures.

Main Results:

• All major FPGA components operated correctly with stable logic speed (<5% change) across the temperature range.
• Clock jitter for MMCM and PLL was reduced by 20%.
• An integrated 1.2 GSa/s ADC demonstrated relatively stable performance, with effective bits dropping from 6 to 4.5 at 15 K.

Conclusions:

• The cryogenic reconfigurable FPGA platform is suitable for implementing digital error-correction control loops in quantum computers.
• The platform exhibits stable electronic performance across a wide temperature range, addressing key challenges in quantum control.
• Further characterization of ADC performance at very low temperatures is warranted.