Parallel point-multiplication architecture using combined group operations for high-speed cryptographic applications.

Area of Science:

• Computer Engineering
• Cryptography
• Hardware Acceleration

Background:

• Elliptic Curve Point Multiplication (ECPM) is fundamental to Elliptic Curve Cryptography (ECC).
• Efficient hardware implementation of ECPM is crucial for high-performance cryptographic processors.
• Existing architectures face challenges in balancing speed, hardware requirements, and energy efficiency.

Purpose of the Study:

• To propose a novel parallel architecture for fast hardware implementation of ECPM.
• To optimize group operations using Jacobian projective coordinates for binary fields.
• To achieve high speed and low hardware resource utilization for ECPM.

Main Methods:

• Designed a novel combined Point Doubling and Point Addition (PDPA) architecture.
• Synthesized the architecture on FPGA and ASIC technologies using a polynomial basis for finite-field arithmetic.
• Implemented ECPM for NIST-recommended binary fields, supporting Koblitz and random curves (163 and 233 bits).

Main Results:

• Achieved the fastest hardware implementation results to date: 3.05 μs (233-bit Koblitz FPGA), 3.56 μs (233-bit random FPGA), and 0.81 μs (233-bit ASIC).
• 163-bit ECPM achieved 0.33 μs (FPGA) and 0.46 μs (ASIC).
• Demonstrated significantly lower area-time product and superior Area × Time × Energy (ATE) product compared to prior works.

Conclusions:

• The proposed parallel architecture offers a significant advancement in hardware ECPM implementation.
• It provides state-of-the-art performance in terms of speed and efficiency for ECC processors.
• The design is well-suited for resource-constrained and high-performance cryptographic applications.