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Related Experiment Video

Updated: Mar 3, 2026

Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station

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Published on: April 1, 2020

High-speed FPGA-based phase measuring profilometry architecture.

Guomin Zhan, Hongwei Tang, Kai Zhong

|May 5, 2017

Summary

This summary is machine-generated.

This study introduces a high-speed FPGA architecture for phase measuring profilometry (PMP), enabling rapid 3D shape reconstruction. The novel pipelined design offers accuracy comparable to software, ideal for embedded applications.

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Last Updated: Mar 3, 2026

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Published on: December 3, 2013

Area of Science:

Computer Engineering
Optical Metrology
Digital Signal Processing

Background:

Phase Measuring Profilometry (PMP) is crucial for 3D shape measurement.
Existing software implementations face speed limitations for real-time applications.

Purpose of the Study:

To develop a high-speed Field-Programmable Gate Array (FPGA) architecture for the PMP algorithm.
To achieve accurate and fast 3D reconstruction suitable for embedded systems.

Main Methods:

Designed and implemented the PMP algorithm using a full-pipeline and parallelism approach on an FPGA.
Utilized 12 phase-shifting images for 3D reconstruction.

Main Results:

The FPGA system demonstrated accuracy comparable to top-performing software.
Achieved 3D reconstruction in 21 ms for 1024 × 768 resolution.
This represents the first fully pipelined architecture for PMP systems.

Conclusions:

The proposed FPGA architecture significantly enhances the speed of PMP.
The system is highly suitable for high-speed embedded 3D shape measurement applications.