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Updated: Feb 28, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Abrupt p-n junction using ionic gating at zero-bias in bilayer graphene
Sameer Grover1, Anupama Joshi1,2, Ashwin Tulapurkar2
1Department of Condensed Matter Physics and Materials Science, Tata Institute of Fundamental Research, Homi Bhabha Road, Mumbai, 400005, India.
Abstract:
Graphene is a promising candidate for optoelectronic applications. In this report, a double gated bilayer graphene FET has been made using a combination of electrostatic and electrolytic gating in order to form an abrupt p-n junction. The presence of two Dirac peaks in the gating curve of the fabricated device confirms the formation of a p-n junction. At low temperatures, when the electrolyte is frozen intentionally, the photovoltage exhibits a six-fold pattern indicative of the hot electron induced photothermoelectric effect that has also been seen in graphene p-n junctions made using metallic gates. We have observed that the photovoltage increases with decreasing temperature indicating a dominant role of supercollision scattering. Our technique can also be extended to other 2D materials and to finer features that will lead to p-n junctions which span a large area, like a superlattice, that can generate a larger photoresponse. Our work creating abrupt p-n junctions is distinct from previous works that use a source-drain bias voltage with a single ionic gate creating a spatially graded p-n junction.
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