Ab initio performance predictions of single-layer In-V tunnel field-effect transistors

The device performances of both n-type and p-type tunnel field-effect transistors (TFETs) made of single-layer InX (X = N, P, As, Sb) are theoretically evaluated through density functional theory (DFT) and ab initio simulations in this paper. It is found that a promising steep subthreshold swing (SS) of [less-than-or-eq] 60 mV dec^-1 can be obtained with gate length L_G = 15.2 nm for all two-dimensional (2D) InX TFETs. In particular, an outstanding on-current of ∼1058 μA μm^-1 (or 880 μA μm^-1) is estimated in a 2D p-type (or n-type) InSb device, which could barely satisfy the ITRS requirements for future high-performance (HP) applications. In addition, the 2D InAs p-type (or n-type) TFET containing a 15.2 nm gate length has great potential to be applied to the low-power (LP) devices with an ON-OFF ratio of I_ON/I_OFF = 1.8 × 10⁷ (or I_ON/I_OFF = 1.9 × 10⁷). However, the density-of-state bottleneck effect strongly influences the behavior of 2D InP and InN devices. Our results provide guidance for experimental synthesis and future designs of a single-layer material device with a steep inverse subthreshold slope, low OFF-, and high ON-current.