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Leaky Integrate and Fire Neuron by Charge-Discharge Dynamics in Floating-Body MOSFET
Sangya Dutta1, Vinay Kumar2, Aditya Shukla2
1Department of Electrical Engineering, IIT Bombay, Mumbai, 400076, India. sangya@ee.iitb.ac.in.
Researchers developed a compact, power-efficient electronic neuron using partially depleted silicon-on-insulator (PD-SOI) MOSFETs. This breakthrough advances large-scale spiking neural networks (SNNs) for efficient learning and recognition tasks.
Area of Science:
- Neuro-inspired computing
- Solid-state device physics
Background:
- Spiking Neural Networks (SNNs) offer efficient learning and recognition.
- Large-scale SNNs require power and area-efficient electronic neurons.
- Previous work demonstrated a 4-terminal gated-INPN device for LIF neurons.
Purpose of the Study:
- To propose and experimentally demonstrate a compact 3-terminal PD-SOI MOSFET as an alternative to the 4-terminal gated-INPN device.
- To utilize impact ionization in SOI-MOSFETs for LIF neuron behavior.
- To enable very-large-scale-integration (VLSI) for biology-scale neural networks.
Main Methods:
- Experimental demonstration of a 3-terminal PD-SOI MOSFET with a 100 nm gate length.
- Utilizing impact ionization (II) induced floating body effect to emulate LIF neuron dynamics.
- Characterizing spiking frequency dependence on input signals.
Main Results:
- Successful experimental demonstration of a compact 3-terminal PD-SOI MOSFET neuron.
- Emulation of Leaky Integrate-and-Fire (LIF) neuron behavior using impact ionization in SOI-MOSFETs.
- Achieved MHz operation, enabling hardware acceleration for neural networks.
Conclusions:
- Conventional PD-SOI-CMOS technology is suitable for VLSI implementation of large-scale SNNs.
- The proposed 3-terminal PD-SOI MOSFET offers a power and area-efficient solution for electronic neurons.
- This approach facilitates the creation of biology-scale neural networks.
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