Agile Blocker and Clock Jitter Tolerant Low-Power Frequency Selective Receiver with Energy Harvesting Capability

In this article, a novel tunable, blocker and clock jitter tolerant, low power, quadrature phase shift frequency selective (QPS-FS) receiver with energy harvesting capability is proposed. The receiver's design embraces and integrates (i) the baseband to radio frequency (RF) impedance translation concept to improve selectivity over that of conventional homodyne receiver topologies and (ii) broadband quadrature phase shift circuitry in the RF path to remove an active multi-phase clock generation circuit in passive mixer (PM) receivers. The use of a single local oscillator clock signal with a passive clock division network improves the receiver's robustness against clock jitter and reduces the source clock frequency by a factor of N, compared to PM receivers using N switches (N≥4). As a consequence, the frequency coverage of the QPS-FS receiver is improved by a factor of N, given a clock source of maximum frequency; and, the power consumption of the whole receiver system can eventually be reduced. The tunable QPS-FS receiver separates the wanted RF band signal from the unwanted blockers/interferers. The desired RF signal is frequency down-converted to baseband, while the undesired blocker/interferer signals are reflected by the receiver, collected and could be energy recycled using an auxiliary energy harvesting device.