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Proposal for nanoscale cascaded plasmonic majority gates for non-Boolean computation.

Sourav Dutta1, Odysseas Zografos2,3, Surya Gurunarayanan2,3

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Researchers developed a nanoscale plasmonic majority logic gate using wave phase for computation. This device offers enhanced functionality and potential for advanced signal processing applications.

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Area of Science:

  • Photonics and Nanotechnology
  • Plasmonics and Metamaterials

Background:

  • Surface-plasmon-polariton (SPP) waves at metal-dielectric interfaces enable integrated photonic circuits beyond the diffraction limit.
  • Current plasmonic logic gates, often intensity-based, do not fully leverage plasmonics' capabilities.

Purpose of the Study:

  • To explore the potential of plasmonic devices by utilizing the majority voter functionality.
  • To develop a nanoscale, cascadable plasmonic majority logic gate using wave phase as the computational variable.

Main Methods:

  • Numerical simulations were employed to design and validate the proposed plasmonic logic gate.
  • A novel referencing scheme was developed to convert wave amplitude and phase information into output electric field intensity.

Main Results:

  • A Metal-Insulator-Metal (MIM) based 3-input majority logic gate was designed.
  • The proposed gate achieved a compact single-stage area of 0.636 μm², significantly smaller than previous plasmonic logic devices.
  • The device demonstrated non-Boolean computational capabilities.

Conclusions:

  • The developed plasmonic majority logic gate effectively utilizes wave phase for computation, offering enhanced functionality.
  • This technology has direct applications in high-parallelism, real-time signal processing, such as pattern recognition.