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Fast Charge Extraction in Perovskite-Based Core-Shell Nanowires.

Michael J Ashley, Edward J Kluender, Chad A Mirkin

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    |July 6, 2018
    PubMed
    Summary

    We developed a new method to create perovskite core-copper thiocyanate shell nanowire arrays. This nanostructure significantly enhances charge extraction efficiency for advanced electronic applications.

    Keywords:
    anodic aluminum oxidecharge extractioncoaxial lithographycopper thiocyanatecore−shell nanowireselectrodepositionperovskite nanowires

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    Area of Science:

    • Materials Science
    • Nanotechnology
    • Semiconductor Physics

    Background:

    • Nanostructured interfaces offer unique properties compared to bulk materials.
    • Core-shell nanowires facilitate rapid charge separation and collection.
    • Existing synthesis methods are limited to specific semiconductor materials.

    Purpose of the Study:

    • To develop a generalizable strategy for synthesizing diverse semiconductor core-shell nanowire arrays.
    • To create methylammonium lead iodide (CH₃NH₃PbI₃) perovskite core-copper thiocyanate shell nanowire arrays.
    • To investigate the impact of core-shell architecture on charge carrier dynamics.

    Main Methods:

    • Utilized anodic aluminum oxide templates for guided synthesis.
    • Employed a combination of electrodeposition and solution casting.
    • Characterized structure and properties using scanning electron microscopy, powder X-ray diffraction, and time-resolved photoluminescence spectroscopy.

    Main Results:

    • Successfully synthesized CH₃NH₃PbI₃ perovskite/copper thiocyanate core-shell nanowire arrays.
    • Demonstrated a nearly 3-orders-of-magnitude acceleration in charge quenching rate compared to axial junctions.
    • Attributed fast quenching to efficient charge extraction by copper thiocyanate nanotubes, minimizing recombination.

    Conclusions:

    • The core-shell nanowire array architecture significantly enhances charge extraction speed and efficiency.
    • Reduced charge separation distance and increased interfacial area are key benefits of this architecture.
    • This method provides a versatile approach for fabricating advanced nanostructured semiconductor devices.