Sub-5 nm monolayer black phosphorene tunneling transistors

The successful fabrication of sub-5 nm 2D MoS₂ field-effect transistors (FETs) announces the approaching post-silicon era. It is possible for tunneling field-effect transistors (TFETs) based on monolayer black phosphorene (ML BP) to work well in the sub-5 nm region because of its moderate direct band gap, anisotropic electronic properties and high carrier mobility. We simulate the device performance limit of the ML BP TFETs at the sub-5 nm scale using ab initio quantum transport calculations. We predict that the on-state currents (I _on) of the sub-5 nm ML BP TFETs will exceed those of the ML WTe₂ TFETs, which possess the highest I _on among the transition-metal dichalcogenide family. In particular, the I _on of the ML BP TFETs can fulfill the 2028 requirements of the international technology roadmap for semiconductors (ITRS) for the high-performance (HP) devices until the gate length is scaled down to 4 nm, while the delay times and power dissipations always surpass the 2028 requirements of the ITRS HP devices significantly in the whole sub-5 nm region.