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Breaking Liebig's Law: An Advanced Multipurpose Neuromorphic Engine.

Runchun Wang1, André van Schaik1

  • 1The MARCS Institute, Western Sydney University, Sydney, NSW, Australia.

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This study introduces a novel, scalable neuromorphic engine overcoming hardware limitations. Its reconfigurable components enable efficient, high-performance artificial intelligence applications.

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FPGAneural engineneuromorphic engineeringspike timing dependant delay plasticityspike timing dependant plasticityspiking neural networks

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Area of Science:

  • Neuromorphic Engineering
  • Computer Architecture
  • Artificial Intelligence Hardware

Background:

  • Existing neuromorphic systems face limitations due to fixed neuron/synapse ratios, hindering scalability and efficiency.
  • Liebig's law restricts performance in current neuromorphic hardware, where the scarcest component dictates overall capability.
  • This bottleneck prevents optimal utilization of resources for diverse AI applications.

Purpose of the Study:

  • To present a massively-parallel, scalable, and multi-purpose neuromorphic engine.
  • To overcome the limitations of fixed-architecture neuromorphic hardware.
  • To enable flexible and efficient implementation of various AI models.

Main Methods:

  • Developed a novel architecture using an array of identical, reconfigurable components.
  • Each component can function as a neuron, synapse, or trainable axon.
  • Supported learning rules include Spike Timing Dependent Plasticity (STDP) and Spike Timing Dependent Delay Plasticity (STDDP).

Main Results:

  • Implemented a prototype with 16 neural engines (0.5 million components) on an FPGA.
  • Achieved high performance with a TSMC 28nm HPC implementation: 2.5 GHz clock frequency.
  • Demonstrated excellent area efficiency (1.68 μm²/component) and low power consumption (0.92 pJ/SOP).

Conclusions:

  • The proposed neuromorphic engine offers a scalable and efficient solution for AI hardware.
  • Runtime reconfigurability and flexible component functionality address limitations of fixed architectures.
  • The design achieves state-of-the-art performance and power efficiency for neuromorphic computing.