A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics.

Area of Science:

• Materials Science
• Nanotechnology
• Electrical Engineering

Background:

• Two-dimensional (2D) materials exhibit unique properties, driving significant research interest for advanced applications.
• Current wafer-scale synthesis limitations necessitate refined fabrication techniques for 2D materials research.
• Precise control over material positioning and electrode definition is crucial for nanoscale device manufacturing.

Purpose of the Study:

• To present a universal fabrication protocol for manufacturing 2D nano-electronics.
• To detail the step-by-step procedures for creating devices like 2D quasi-heterojunction bipolar transistors (Q-HBTs) and 2D back-gated transistors.
• To provide accessible information for research groups to replicate and advance 2D nano-electronic fabrication.

Main Methods:

• Development of a fabrication protocol encompassing material positioning, electron beam lithography (EBL), and metal electrode definition.
• Step-by-step demonstration of fabrication procedures for specific 2D devices.
• Validation of the protocol through the creation of high-performance, repeatable devices.

Main Results:

• Successful implementation of a universal fabrication protocol for 2D nano-electronics.
• Fabrication of high-performance 2D quasi-heterojunction bipolar transistors (Q-HBTs) and 2D back-gated transistors.
• Demonstration of high repeatability across all fabricated devices.

Conclusions:

• The presented protocol offers a comprehensive approach to 2D nano-electronic fabrication.
• This work facilitates broader access to advanced fabrication techniques for research groups.
• The protocol paves the way for the development of next-generation electronic devices based on 2D materials.