Neuromorphic LIF Row-by-Row Multiconvolution Processor for FPGA.

Area of Science:

• Computer Vision
• Neuromorphic Engineering
• Hardware Acceleration

Background:

• Deep Learning, particularly Convolutional Neural Networks (CNNs), excels in computer vision but demands significant computational resources.
• Existing frame-based hardware solutions for real-time CNN deployment still face high operational demands due to complex models.
• Neuromorphic event-based techniques offer an alternative to reduce computational load by processing luminosity changes.

Purpose of the Study:

• To propose an event-based Field-Programmable Gate Array (FPGA) multiconvolution system inspired by Leaky Integrate-and-Fire (LIF) neurons.
• To enhance computational efficiency for deep learning models in computer vision applications.
• To develop a hardware architecture suitable for spike-based Convolutional Neural Networks (CNNs).

Main Methods:

• Implementation of an event-based multiconvolution system on an FPGA.
• Integration of a novel memory arbiter for efficient memory access and row-by-row kernel processing.
• Utilizing neuromorphic event-based vision principles for processing luminosity changes.

Main Results:

• The system efficiently convolves 64 filters across multiple kernel sizes (1x1 to 7x7).
• Achieved low latencies of 1.3 μs for 1x1 kernels and 9.01 μs for 7x7 kernels.
• Generates a continuous flow of output events, demonstrating real-time processing capabilities.

Conclusions:

• The proposed event-based FPGA multiconvolution system offers a computationally efficient alternative to traditional frame-based approaches.
• The architecture's design, featuring a memory arbiter, facilitates efficient processing of spike-based CNNs.
• This advancement paves the way for low-power, real-time deep learning applications in computer vision.