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A Cyclic Vernier Two-Step TDC for High Input Range Time-of-Flight Sensor Using Startup Time Correction Technique.
Van Nhan Nguyen1, Duc Nha Duong2, Yunmo Chung3
1School of Electronics and Information, Information and Communication System-on-chip (SoC) Research Center, Kyung Hee University, Yongin 17104, Korea. nhannguyen@khu.ac.kr.
This study introduces a low-power cyclic Vernier time-to-digital converter (TDC) for time-of-flight sensors, achieving a wide 355 ns dynamic range with high linearity and low power consumption.
Area of Science:
- Electrical Engineering
- Integrated Circuit Design
- Sensor Technology
Background:
- Traditional time-to-digital converters (TDCs) struggle with wide input ranges (>300 ns) due to area and power constraints.
- Limited linearity in cyclic TDCs for high input ranges is often caused by unaddressed startup time effects.
- Time-of-flight (TOF) sensors require high-performance TDCs for accurate distance measurements.
Purpose of the Study:
- To develop a low-power, wide-range, and linear cyclic Vernier TDC suitable for TOF applications.
- To address and compensate for the impact of startup time on TDC linearity.
- To achieve high resolution and accuracy in distance measurements using the developed TDC.
Main Methods:
- Proposed a cyclic Vernier two-step TDC architecture.
- Implemented digitally-controlled oscillators (DCOs) with dual frequency control and matched startup times.
- Utilized an alignment detector for startup time correction and a symmetric arbiter for precise edge alignment detection.
- Employed a current-reuse approach in the arbiter for low-power, high-speed operation.
- Fabricated the TDC using a 0.18 μm CMOS process.
Main Results:
- Achieved a wide dynamic range of 355 ns and a fine resolution of 377 ps.
- Demonstrated excellent linearity with Differential Nonlinearity (DNL) of 0.28 LSBrms and Integral Nonlinearity (INL) of 0.96 LSBrms.
- The TDC achieved a low power consumption of 0.65 mW in a compact area of 0.028 mm².
- When applied to TOF sensing, it enabled a distance range of 53.2 m with 5.65 cm resolution and an RMS error of 5.42 cm.
Conclusions:
- The proposed low-power cyclic Vernier TDC effectively overcomes the limitations of traditional designs for wide-range applications.
- The implemented startup time compensation technique significantly improves linearity, making it ideal for high-input-range TDCs.
- This TDC offers a promising solution for accurate and efficient distance sensing in TOF applications.
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