Steep Slope Silicon-on-Insulator Field Effect Transistor with Negative Capacitance: Analysis on Hysteresis

In recent 10 years, many studies have investigated/considered negative capacitance field effect transistor (NCFET) as future low-power device. In addition to the experimental demonstration of NC planar bulk MOSFET, the state-of-the-art 14 nm FinFET technology has adopted the benefits of using negative capacitance and therefore, the NC-FinFET is expected to be available in market. However, there is a lack of experimental study on NC Silicon-on-Insulator (SOI) FET, which should be another candidate for ultra-low-power device. To complement the lack of such studies, in this work, the experimental study on NCSOI device (e.g., the degree of hysteresis, steep switching characteristic, and so on) has been done with reliable 10 nm hafnium-based ferroelectric capacitor.