Electrochemical Polishing of Cu Redistribution Layers for Fan-Out Wafer Level Packaging
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Updated: Jan 25, 2026

Metal-Assisted Electrochemical Nanoimprinting of Porous and Solid Silicon Wafers
Published on: February 8, 2022
Kimoon Park1, Jinhyun Lee2, Bongyoung Yoo1
1Department of Advanced Material Science & Engineering, Hanyang University, Ansan-si, Gyeonggi-do, 15588, Republic of Korea.
Abstract:
Cu overburden layers on the trenches from redistribution layer process of fan-out wafer level packaging were successfully polished by electrochemical polishing method. For the uniform electrochemical polishing of Cu overburden on inside and outside of the trenches, thickness of the Cu overburden was controlled to have same thickness at the both side of trenches by addition of the additives such as accelerator, suppressor, and leveler. Before the electrochemical polishing of Cu overburden, optimum polishing potential and polishing rates were determined to 1.3 V and 462 nm/C · cm-2 through the cyclic voltammetry analysis and observation of electrochemical polishing behavior of Cu planar substrate in 85% H₃PO₄. Electrochemical polishing of Cu overburden was carried out at the condition determined from the previous experiment. The results of electrochemical polishing indicated that Cu overburden on both side of trenches was totally removed simultaneously at the end of electrochemical polishing and Cu overburden profile was important for the uniform planarization of Cu overburden on both side of the trenches.
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