A Flexible Hybrid BCH Decoder for Modern NAND Flash Memories Using General Purpose Graphical Processing Units...

Area of Science:

• Coding Theory
• Digital Communications
• Computer Engineering

Background:

• Bose-Chaudhuri-Hocquenghem (BCH) codes are vital for error correction in flash memory and digital communication systems.
• Existing BCH decoder solutions often rely on CPUs, hardware, or GPUs, with performance being critical for flash memory applications.
• A flexible solution is needed to correct multiple bit errors across diverse finite fields (GF(2^m)).

Purpose of the Study:

• To propose a novel, pragmatic approach for decoding BCH codes over different finite fields using a combination of hardware circuits and Graphics Processing Units (GPUs).
• To enhance the flexibility and performance of BCH decoders for correcting multiple bit errors.

Main Methods:

• A hybrid architecture is proposed, utilizing hardware for a modified syndrome generator and GPUs for the key-equation solver and error correction.
• The modified syndrome generator offers zero latency in error-free scenarios.
• GPUs are employed for error correction using the iterative Berlekamp-Massey (iBM) and Chien search algorithms when errors are detected.

Main Results:

• The proposed partitioned approach successfully supports multiple bit error correction across different BCH block codes without performance degradation.
• The modified syndrome generation method achieves zero latency for error-free cases.
• The system demonstrates the ability to support various multiple finite fields with high throughput.

Conclusions:

• The tandem hardware-GPU approach provides a flexible and high-performance solution for decoding BCH codes over diverse finite fields.
• This method effectively addresses the need for robust error correction in systems sensitive to multiple bit errors.
• The zero-latency modified syndrome generator and efficient GPU-based correction algorithms contribute to overall system efficiency.