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Sensitivity Enhancement of Soft Capacitive Pressure Sensors Using a Solvent Evaporation-Based Porosity Control Technique
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A VCII-Based Stray Insensitive Analog Interface for Differential Capacitance Sensors.

Gianluca Barile1, Leila Safari2, Giuseppe Ferri2

  • 1Department of Industrial and Information Engineering and Economics, University of L'Aquila, 67100 L'Aquila, Italy. gianluca.barile@graduate.univaq.it.

Sensors (Basel, Switzerland)
|August 17, 2019
PubMed
Summary

This study introduces a novel CMOS interface for differential capacitive sensors, utilizing second-generation voltage conveyors (VCIIs) for stray insensitivity. The new design offers high speed, accuracy, and simple implementation for capacitive sensing applications.

Keywords:
VCIIdifferential capacitive sensorhigh sensitivityparasitic insensitivereadout circuit

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Area of Science:

  • * Electrical Engineering
  • * Analog Integrated Circuit Design

Background:

  • * Traditional capacitive sensor interfaces are susceptible to parasitic capacitances, affecting accuracy.
  • * Existing designs often lack speed and simplicity in signal processing.
  • * Novel active elements are needed to improve performance in capacitive sensing.

Purpose of the Study:

  • * To present a stray-insensitive CMOS interface circuit for differential capacitive sensors.
  • * To leverage second-generation voltage conveyors (VCIIs) for enhanced performance.
  • * To achieve a high-speed, accurate, and simple readout circuit.

Main Methods:

  • * Implementation of a novel circuit using second-generation voltage conveyors (VCIIs).
  • * Employing a simple feedback loop to achieve insensitivity to parasitic capacitances.
  • * Designing a switch-free CMOS interface in a 0.35 μm technology.
  • * Prototyping a discrete version using AD844 and LF411 for validation.

Main Results:

  • * Output voltage is proportional to differential capacitor changes.
  • * Achieved constant sensitivity up to 412 mV/pF.
  • * Demonstrated a maximum linearity error of 1.9%FS.
  • * Showcased good performance with low baseline capacitive sensors (10 pF).

Conclusions:

  • * The proposed VCII-based CMOS interface effectively addresses stray capacitance issues.
  • * The circuit offers high speed, accuracy, and a simple, switch-free structure.
  • * Results confirm the viability of the novel approach for capacitive sensing applications.