An RISC-V Processor with Area-Efficient Memristor-Based In-Memory Computing for Hash Algorithm in Blockchain...

Area of Science:

• Computer Engineering
• Embedded Systems
• Cybersecurity

Background:

• Blockchain technology is vital for security and data integrity in Internet of Things (IoT) devices.
• Implementing complex cryptographic algorithms like hashing on resource-constrained IoT devices faces challenges in energy consumption and processing speed.

Purpose of the Study:

• To propose and develop an efficient RISC-V processor integrated with memristor-based in-memory computing (IMC) for blockchain applications in IoT.
• To adapt the Keccak hash algorithm for IMC implementation within the RISC-V architecture.

Main Methods:

• Designed IMC-adapted instructions for the Keccak hash algorithm, leveraging the RISC-V instruction set architecture (ISA) extensibility.
• Developed an area-efficient RISC-V processor with memristor-based IMC, based on the Hummingbird E200 open-source core.
• Disclosed a compiling policy and data allocation method for IMC implementation of the Keccak hash algorithm.

Main Results:

• Achieved over 70% improvement in performance compared to traditional methods.
• Demonstrated over 70% improvement in energy saving.
• Maintained limited area overhead with the integration of IMC.

Conclusions:

• Memristor-based IMC offers a significant performance and energy efficiency boost for blockchain computations on RISC-V processors in IoT.
• The proposed architecture effectively addresses the resource limitations of IoT devices for secure blockchain operations.
• This approach paves the way for more robust and efficient blockchain-enabled IoT ecosystems.