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Quantum computation with universal error mitigation on a superconducting quantum processor.

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Quantum error mitigation techniques can reduce errors in near-term quantum computers without full fault tolerance. This study demonstrates a protocol using gate set tomography and quasi-probability decomposition to suppress errors in superconducting devices.

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Area of Science:

  • Quantum Computing
  • Quantum Information Science

Background:

  • Medium-scale quantum devices with hundreds of physical qubits are emerging.
  • These devices will not support full quantum fault tolerance.
  • Minimizing errors is crucial for exploring quantum computational advantage.

Purpose of the Study:

  • To demonstrate a quantum error mitigation protocol.
  • To address the challenge of device imperfections in near-term quantum computers.
  • To validate the protocol on a superconducting quantum device.

Main Methods:

  • Developed an error mitigation protocol utilizing gate set tomography.
  • Employed quasi-probability decomposition for error correction.
  • Tested the protocol on one- and two-qubit circuits on superconducting hardware.

Main Results:

  • Successfully suppressed computational errors in tested quantum circuits.
  • Demonstrated the protocol's effectiveness on a physical superconducting quantum device.
  • Validated the protocol's applicability to expected value computations.

Conclusions:

  • Quantum error mitigation is a viable strategy for near-term quantum computation.
  • The demonstrated protocol is universal for digital quantum computers.
  • Error mitigation is poised to be a key component in future quantum computing.