Securing Cryptographic Chips against Scan-Based Attacks in Wireless Sensor Network Applications

Area of Science:

• Computer Science
• Electrical Engineering
• Cybersecurity

Background:

• Wireless Sensor Networks (WSN) are vital for modern life, necessitating robust information security and privacy.
• Cryptographic algorithms are essential for WSN security but require rigorous hardware testing.
• Scan design, while improving test quality, poses a security risk by potentially exposing cryptographic keys.

Purpose of the Study:

• To develop a secure scan architecture for cryptographic hardware in WSNs.
• To address the vulnerability of scan design to key deduction attacks.
• To enhance the security of cryptographic chips without compromising the benefits of scan design.

Main Methods:

• Introduction of a secure scan architecture with automatic test control circuitry.
• Isolation of cipher keys and clearing of sensitive information during test mode switching.
• Development of an enhanced scheme incorporating test authorization for secure access.

Main Results:

• The proposed secure scan architecture effectively isolates cryptographic keys in test mode.
• The enhanced scheme with test authorization prevents unauthorized access to cipher keys.
• The solution maintains the advantages of scan design while significantly improving security.

Conclusions:

• The developed secure scan architecture and enhanced authorization scheme effectively protect cryptographic hardware in WSNs.
• This approach mitigates the security risks associated with scan design in cryptographic applications.
• The findings contribute to more secure and reliable WSN implementations.