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Erratum: Borejko, T., et al. NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. <i>Sensors</i> 2020, <i>20</i>, 1069.

Sensors (Basel, Switzerland)·2020
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NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor.

Tomasz Borejko1,2, Krzysztof Marcinek1,2, Krzysztof Siwiec1,2

  • 1Warsaw University of Technology, Institute of Microelectronics and Optoelectronics, ul. Koszykowa 75, 00-662 Warsaw, Poland.

Sensors (Basel, Switzerland)
|February 22, 2020
PubMed
Summary

This study presents the first dual-frequency single-chip Global Navigation Satellite System (GNSS) receiver with an integrated multi-core processor. This advanced System-on-Chip (SoC) enables high-accuracy positioning by receiving signals from multiple satellite constellations.

Keywords:
GNSS application receivermulti-constellationmulti-frequencysoftware defined radio

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Area of Science:

  • Electrical Engineering
  • Satellite Navigation Systems
  • Integrated Circuit Design

Background:

  • Global Navigation Satellite System (GNSS) receivers are crucial for precise positioning, velocity, and timing.
  • Existing GNSS solutions often require external processors and struggle with multi-constellation signal reception.
  • The demand for compact, high-accuracy, and integrated GNSS solutions is increasing across various applications.

Purpose of the Study:

  • To develop and characterize a novel dual-frequency, all-in-one GNSS receiver System-on-Chip (SoC).
  • To integrate a multi-core application processor with a GNSS radio frequency (RF) front-end and baseband navigation engine on a single chip.
  • To demonstrate the capability of receiving and processing signals from multiple global and regional satellite navigation systems simultaneously.

Main Methods:

  • Integration and manufacturing of a System-on-Chip (SoC) using a 110 nm CMOS process.
  • Design of a GNSS RF front-end capable of receiving multiple frequencies (L1/E1, L5/E5ab) from various constellations (Galileo, GPS, BeiDou, GLONASS, QZSS, IRNSS, SBAS).
  • Incorporation of a multi-core 32-bit RISC application processor with embedded flash memory for direct execution of user applications.

Main Results:

  • The developed SoC successfully receives and processes dual-frequency signals from multiple GNSS constellations, enabling high-accuracy positioning.
  • The integrated solution provides precise position, velocity, and time (PVT) data or raw GNSS data for sensor fusion (e.g., with IMU) without external processors.
  • The chip exhibits excellent radio performance (NF=2.3 dB, G=131 dB) with low power consumption (35 mW) and a small silicon area (4.5 mm²).

Conclusions:

  • The presented SoC is the first dual-frequency single-chip GNSS receiver with an integrated multi-core application microcontroller and embedded flash memory.
  • This all-in-one solution offers a significant advancement in miniaturization and performance for high-accuracy satellite navigation.
  • The chip's capabilities support direct execution of user applications, reducing system complexity and cost for various GNSS-dependent devices.