Demonstrating delay-based reservoir computing using a compact photonic integrated chip

Photonic delay-based reservoir computing (RC) has gained considerable attention lately, as it allows for simple technological implementations of the RC concept that can operate at high speed. In this paper, we discuss a practical, compact and robust implementation of photonic delay-based RC, by integrating a laser and a 5.4 cm delay line on an InP photonic integrated circuit. We demonstrate the operation of this chip with 23 nodes at a speed of 0.87 GSa/s, showing performances that is similar to previous non-integrated delay-based setups. We also investigate two other post-processing methods to obtain more nodes in the output layer. We show that these methods improve the performance drastically, without compromising the computation speed.