A Model-Based Design Floating-Point Accumulator. Case of Study: FPGA Implementation of a Support Vector Machine...

Area of Science:

• Embedded Systems
• Computer Engineering
• Machine Learning Hardware Acceleration

Background:

• Wearable sensors require advanced platforms for complex, resource-demanding algorithms like machine learning.
• Field Programmable Gate Arrays (FPGAs) offer a solution for high computational power through custom hardware.
• Model-based design and automatic code generation are emerging techniques in FPGA development.

Purpose of the Study:

• To present a novel model-based floating-point accumulation circuit for FPGAs.
• To design a hardware accelerator optimized for computing Support Vector Machine (SVM) kernel functions.
• To evaluate the performance of the proposed circuit against existing solutions.

Main Methods:

• Developed a floating-point accumulation circuit using a model-based approach in Simulink.
• Utilized the state-of-the-art delayed buffering algorithm for the circuit architecture.
• Implemented and simulated the design using Simulink and VHDL.
• Validated performance through post-implementation simulations and on-FPGA measurements using a polynomial kernel function.

Main Results:

• The proposed circuit demonstrated superior performance in terms of speed and area efficiency compared to other solutions.
• Simulink simulations indicated significant advantages in computational efficiency.
• VHDL post-implementation simulations and FPGA measurements confirmed the effectiveness of the accumulator.

Conclusions:

• The novel model-based floating-point accumulator offers an efficient hardware solution for resource-intensive algorithms in wearable sensor applications.
• The designed circuit effectively computes SVM kernel functions with improved speed and reduced hardware footprint.
• The results validate the potential of model-based design for creating high-performance FPGA accelerators for machine learning on edge devices.