Reconfigurable hardware implementation of coherent averaging technique for ultrasonic NDT instruments

Area of Science:

• Electrical Engineering
• Materials Science
• Non-Destructive Testing

Background:

• Ultrasonic non-destructive testing (NDT) systems require efficient data processing for accurate defect detection.
• Coherent averaging is a crucial technique for noise reduction and signal enhancement in ultrasonic NDT.
• Existing hardware implementations often face limitations in terms of memory, computational resources, and processing speed.

Purpose of the Study:

• To propose and implement a novel hardware architecture for coherent averaging on a Field-Programmable Gate Array (FPGA).
• To optimize the coherent averaging process for reconfigurable ultrasonic NDT systems.
• To evaluate the performance improvements in terms of hardware resource utilization and processing efficiency.

Main Methods:

• Developed a novel FPGA-based coherent averaging architecture.
• Utilized addressing-based shifting for addition and Radix-2 non-restoring algorithm for division.
• Implemented the architecture within a reconfigurable ultrasonic imaging system.
• Experimentally validated performance using various NDT applications.

Main Results:

• Achieved a 96% reduction in memory storage compared to conventional architectures.
• Reduced the number of adders by 98%.
• Decreased processing time by 32% for 64 coherent averages.
• Demonstrated effective removal of RF random false-echoes, smoothing of A-scan waveforms, and speckle removal in B-scan images.

Conclusions:

• The proposed FPGA hardware implementation offers significant advantages for coherent averaging in ultrasonic NDT.
• The architecture's efficiency and on-the-fly control capabilities enhance the performance of reconfigurable ultrasonic systems.
• This novel approach facilitates real-time data processing and improved image quality in NDT applications.