Reconfigurable hardware implementation of coherent averaging technique for ultrasonic NDT instruments

The paper proposed a novel hardware (FPGA) implementation of the coherent averaging architecture for the reconfigurable ultrasonic NDT system. The proposed hardware architecture uses the addressing based shifting technique for the addition operation and Radix-2 non-restoring algorithm for the division operation. Since the amount of hardware required by the proposed averaging scheme is independent of the number of averages, it supports on-the-fly control on the number of averages. Compared to conventional architecture, it provides 96% reduction in memory storage, 98% reduction in the number of adders, and 32% reduction in the processing time for the case of 64 coherent averages. For the experimentation, the ultrasonic imaging system designed and developed by the authors has been utilized. The developed system further supports dynamic on-line reconfiguration of the analog front-end hardware, real-time data acquisition, real-time hardware based data processing, and data transfer operations. The performance of implemented coherent averaging has been presented by various applications such as removal of RF random false-echoes, smoothing of A-scan waveforms and speckle removal of B-scan images.