Efficient layout-aware statistical analysis for photonic integrated circuits

Fabrication variability significantly impacts the performance of photonic integrated circuits (PICs), which makes it crucial to quantify the impact of fabrication variations before the final fabrication. Such analysis enables circuit and system designers to optimize their designs to be more robust and obtain maximum yield when designing for manufacturing. This work presents a simulation methodology, Reduced Spatial Correlation Matrix-based Monte-Carlo (RSCM-MC), to efficiently study the impact of spatially correlated fabrication variations on the performance of PICs. First, a simple and reliable method to extract physical correlation lengths, variability parameters that define the inverse of the spatial frequencies of width and height variations over a wafer, is presented. Then, the process of generating correlated variations for MC simulations using RSCM-MC methodology is presented. The methodology generates correlated variations by first creating a reduced correlation matrix containing spatial correlations between all the circuit components, and then processing it using Cholesky decomposition to obtain correlated variations for all circuit components. These variations are then used to conduct MC simulations. The accuracy and the computation performance of the proposed methodology are compared with other layout-dependent Monte-Carlo simulation methodologies, such as Virtual wafer-based Monte-Carlo (VW-MC). A Mach-Zehnder lattice filter is used to study the accuracy, and a second-order Mach-Zehnder filter and a 16x16 optical switch matrix system are used to compare the computational performance.