Design of Reconfigurable Time-to-Digital Converter Based on Cascaded Time Interpolators for Electrical Impedance...

Area of Science:

• Electrical Engineering
• Instrumentation and Measurement

Background:

• Electrical Impedance Spectroscopy (EIS) requires precise phase quantization of impedance.
• Traditional time-to-digital converters (TDCs) face challenges in handling wide frequency ranges and achieving high resolution simultaneously.
• Existing TDC designs struggle to balance input-time range and time resolution requirements for low and high-frequency EIS analysis.

Purpose of the Study:

• To present a reconfigurable time-to-digital converter (TDC) for phase quantization in electrical impedance spectroscopy (EIS).
• To address the conflicting demands of wide input-time range for low frequencies and high resolution for high frequencies in EIS.
• To develop a TDC with improved measurement time and chip area compared to single-stage interpolators.

Main Methods:

• Implementation of a coarse counter for wide input-time range support.
• Utilization of cascaded time interpolators to enhance time resolution without increasing clock speed.
• Adoption of a reconfigurable time interpolation factor for adaptable phase resolution and measurement time.

Main Results:

• The fabricated TDC demonstrates a peak-to-peak phase error below 0.72° from 1 kHz to 512 kHz.
• Phase error remains below 2.70° when the frequency range is extended to 2.048 MHz.
• Cascaded interpolators offer reduced measurement time and chip area compared to single-stage designs for equivalent interpolation factors.

Conclusions:

• The proposed reconfigurable TDC effectively quantizes impedance phase in EIS across a broad frequency spectrum.
• The design achieves competitive performance, offering a viable solution for advanced EIS instrumentation.
• The TDC's reconfigurability and cascaded interpolator architecture provide a robust and efficient approach to impedance phase measurement.