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Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology
Published on: December 7, 2015
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Aligned, high-density semiconducting carbon nanotube arrays for high-performance electronics
1Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, Department of Electronics, Peking University, Beijing 100871, China.
Science (New York, N.Y.)
|May 23, 2020
Summary
Researchers developed a scalable method for producing highly pure semiconducting single-walled carbon nanotube (CNT) arrays. These CNT arrays enable the fabrication of field-effect transistors (FETs) surpassing commercial silicon performance for advanced integrated circuits.
Area of Science:
- Materials Science
- Nanotechnology
- Electrical Engineering
Background:
- Fabricating integrated circuits below 10 nanometers requires scalable production of electronically pure semiconducting nanotube arrays.
- Current methods face challenges in achieving high purity and precise alignment of carbon nanotubes (CNTs).
Purpose of the Study:
- To develop a scalable process for producing dense, well-aligned, and electronically pure semiconducting single-walled carbon nanotube (CNT) arrays on silicon wafers.
- To evaluate the performance of field-effect transistors (FETs) fabricated using these CNT arrays.
Main Methods:
- A multiple dispersion and sorting process was employed to achieve high semiconducting purity.
- A dimension-limited self-alignment (DLSA) procedure was used to create well-aligned CNT arrays with tunable density.
- Top-gate FETs and five-stage ring oscillators were fabricated on the CNT arrays.
Main Results:
- Achieved CNT arrays with >9 degrees alignment and densities of 100-200 CNTs/µm on a 10-cm wafer.
- Fabricated FETs demonstrated superior performance over commercial silicon FETs, with an on-state current of 1.3 mA/µm and transconductance of 0.9 mS/µm at 1V.
- Low room-temperature subthreshold swing (<90 mV/decade) and a maximum oscillating frequency of >8 GHz for ring oscillators were recorded.
Conclusions:
- The developed multiple dispersion, sorting, and DLSA process enables scalable fabrication of high-performance semiconducting CNT arrays.
- These CNT arrays are suitable for next-generation integrated circuits, outperforming current silicon-based technologies.
- The demonstrated performance metrics pave the way for advanced nanoelectronic devices.
